SoC ASIC/FPGA Design Engineer - RTL, C/C++, Python

SoC ASIC/FPGA Design Engineer - RTL, C/C++, Python

Edison Smart | Cambridge, ENG, GB

Posted 19 days ago

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Description

A technology company in Cambridge is seeking an ASIC Hardware Engineer to join their advanced semiconductor team. The ideal candidate will have a strong background in ASIC and/or FPGA design, along with programming experience in C/C++ and Python. Candidates should be knowledgeable about GPU, CPU, DSP, or FPU architectures. This role promises an exciting opportunity for career advancement within a leading organization focused on cutting-edge technologies.

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