Senior Verification Engineer – RTL/UVM, Hybrid Work

AccelerComm Ltd. is seeking a Senior Verification Engineer in Bristol, UK to lead RTL verification across ASIC/FPGA designs. You will develop verification plans, build SystemVerilog/UVM environments, and drive robust validation prior to deployment. Hybrid working is available.

The role requires 3+ years in digital verification, strong SystemVerilog/UVM skills, Linux scripting, and a collaborative mindset to work across multiple teams.

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